General Specification
| Item | Nominal Dimension | Unit |
|---|---|---|
| Dot Matrix | 240 x RGB x 320 | Dots |
| Module Size ( W×H×T ) | 42.52 x 60.50 x 2.20 | mm. |
| Active Area ( W×H ) | 36.72 x 48.96 | mm. |
| Pixel arrangement | RGB Stripe | mm. |
| Dot Pitch ( W×H ) | 0.153 x 0.153 | mm. |
| Color depth | 262K(MAX) | colors |
| Interface | SPI & RGB | – |
| Driving IC Package | COG | – |
| Operating temperature | -20 ~70 | ºC |
| Storage temperature | -30~80 | ºC |
| LCD Type | a-Si TFT | – |
| LCD Mode | Normal Black | – |
| Backlight Type | LED x 4 | PCS |
Interface Definition
| Pin No | Pin Symbol | Type | Description |
|---|---|---|---|
| 1 | GND | 0V | Ground |
| 2 | VCC | 2.4-3.3V | Power supply |
| 3 | IM2 | H/L | IM3 has been connected to GND |
| 4 | IM1 | H/L | |
| 5 | IM0 | H/L | |
| 6 | /RESET | H/L | Chip reset signal |
| 7 | CS | H/L | Chip selection signal |
| 8 | SCL | H/L | Serial Clock signal |
| H/L | Display data/command selection pin in 4-line serial interface. | ||
| 9 | RS | Second Data lane in 2 data lane serial interface. | |
| 10 | VSYNC | H/L | Vertical (Frame) synchronizing input signal |
| 11 | HSYNC | H/L | Horizontal (Line) synchronizing input signal |
| 12 | ENABLE | H/L | Data enable signal |
| 13 | DOTCLK | H/L | Dot clock signal |
| 14 | SDA | H/L | Serial data input/output pin |
| 15-32 | DB0-DB17 | H/L | RGB interface data bus |
| 33 | LEDA | – | LED light, anode |
| 34 | LEDK | – | LED light, cathode. |
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